1. Field of the Invention
The present invention relates to a semiconductor structure. More particularly, the present invention relates to a semiconductor structure having a flattened surface and a method for forming the same.
2. Descriptions of the Related Art
Bump electroplating techniques are used in microelectronics and micro system fields, such as in connections between flat panel displays (FPD) and drivers IC, in conductive lines and air bridges techniques in GaAs chips, and in the manufacturing of X-ray masks in LIGA techniques. The aforementioned techniques apply bump electroplating techniques at different stages throughout the manufacturing process.
For example, in a IC chip and circuit board setup, the IC chip is connected to the circuit board in many available ways, and the main packaging method is related to the gold bump electroplating technique. The pad of the IC chip is thereby electrically connected to the circuit board by the use of this technique. The aforementioned techniques not only greatly shrink dimensions of the chip, but also affix the chip on the circuit board, thus reducing the size, decreasing the sensitivity, and improving heat dissipation of the chip and the circuit board. Additionally, electroplating techniques are low cost, an obvious benefit in the development and manufacturing of these chips.
A typical bump electroplating process, such as a gold bump electroplating process, requires forming an under bump metal (UBM) on the pad first. The UBM is applied as an adhesion layer between the bump and the pad, as well as connected to a conductive layer that is jointly used as media during electroplating. The conductive layer is substantially formed either simultaneously with, or separately from, the UBM. Meanwhile, the conductive layer and the UBM may be formed by the same process and made of the same materials. Therefore, the bump can be formed successfully on the UBM and be electrically connected to the pad via the UBM. Before the electroplating process, a plurality of conductive layers, or conductive UBM, are formed on the surface of the chip, except the pad. After the bump is formed in the electroplating process, the conductive layers or UBM are then removed by etching.
The bump is larger in lateral dimension than the pad so that after the electroplating process, the bottom of the bump provides sufficient support when the bump is being connected to the circuit board, thus preventing cracks or deformations from compression. Referring to FIG. 1, the UBM 12 is naturally formed with two corner portions 12a when the UBM 12 is formed on the opening portion defined by the pad 13 and the passivation layer 14. When the bump 10 is isotropically accumulated along the upward direction from the UBM 12, for example by the electroplating process, the bump 10 would naturally cover the corner portions 12a. Therefore, the top surface 11 of the bump 10 would be rugged due to the rugged surface of the UBM 12 and present jutting corners 101 and 102.
The aforementioned jutting corners 101 and 102 can cause contacting surface damage or a bad connection when the bump 10 is being connected to the circuit board and can result bad electric conductivity. Therefore, extra processes such as polishing are needed to eliminate the jutting corners. The extra processes are not convenient and are difficult during the stages of quality control.
Further, since the surface of the chip may be rugged, the UBM may suffer break point and hinder electric conductivity when the UBM is formed on the surface of the chip. Additionally, the UBM may be not uniform in thickness, thus resulting in increased electric resistance of the UBM. To solve the aforementioned issues, prior arts are provided with a thicker UBM. However a thicker UBM would have higher resistance. Since the main objective of the UBM is to be the adhesion layer between the bump and the pad, and the UBM naturally has higher resistance compared to the pad and bump, a thicker UBM will result in a significant increase in electric resistance between the bump and the pad, thus harming electric conductivity between the chip and the circuit board. The aforementioned situations influence the electroplating process and decrease the yield of electroplating the bump, resulting in either the need for post-processing procedures, or an unusable chip altogether.
Accordingly, a solution of providing a conductive structure for a semiconductor integrated circuit is highly desired in semiconductor technology.